Senior FPGA Engineer (FICCO)

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk.

Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets.

We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus.

We are currently seeking a Senior FPGA Engineer to join one of our trading teams. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design.

Responsibilities:

• Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up.
• Facilitate software integration efforts by developing new APIs and optimizing low level code.
• Propose creative solutions to overcome FPGA/hardware limitations.
• Collaborate directly with software/strategy team and other design teams.
• Conduct lab debugging and support deployed solutions.

Candidate Requirements:

• Bachelor’s degree or higher, Computer/Electrical Engineering with 4+ years of experience within the field.
• Solid Hardware Engineering experience, especially with FPGA.
• Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production.
• Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation.
• Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog.
• Experience in FPGA design flow including synthesis, place & route , static timing analysis is required.
• Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required.
• Knowledge of the TCP/IP stack and on-chip networking applications.
• Strong working knowledge of either XILINX or ALTERA FPGA design flow.
• Experience with functional verification utilizing high-level methodologies (e.g. System Verilog) is a plus.
• Strong system level debugging and data analysis skills.

The annual base salary range for this position is $200,000 to $250,000, depending on the candidate’s experience, qualifications, and relevant skill set. Base salary is only a portion of total compensation, which may also include variable compensation and/or benefits.

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