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Other Engineering

Senior System Engineer

NewPosted 2 days ago

Senior System Engineer

  • Work with the engineering team to integrate MediaTek SOC platforms with customer
  • Software development and integration for customizing software for customer product
Other Engineering

Datacenter Compute Platform Architect

NewPosted 2 weeks ago

Datacenter Compute Platform Architect

  • Platform Architecture Definition: Define the compute system architecture (workstation, 1U/2U, multi-node, OCP form factors) surrounding our Datacenter compute SoC.
  • Power & Thermal Management: Architect system-level power delivery networks (PDN/VRM specs) and collaborate on advanced thermal solutions (air and liquid cooling) to meet strict datacenter TDP constraints.
Other Engineering

Datacenter Server CPU Platform Architect

NewPosted 2 weeks ago

Datacenter Server CPU Platform Architect

  • Platform Architecture Definition: Define the compute system architecture (workstation, 1U/2U, multi-node, OCP form factors) surrounding our Datacenter compute SoC.
  • Power & Thermal Management: Architect system-level power delivery networks (PDN/VRM specs) and collaborate on advanced thermal solutions (air and liquid cooling) to meet strict datacenter TDP constraints.
Other Engineering

Senior System Application Engineer – SerDes & System Tuning

NewPosted 3 weeks ago

Senior System Application Engineer – SerDes & System Tuning

  • Lead customer SerDes bring-up, tuning, validation, and advanced debug end-to-end.
  • Tune SerDes/link parameters to improve stability, BER, and operating margin; analyze link training and equalization behavior.
Other Engineering

System Application Engineer – Customer System Engineering

NewPosted 3 weeks ago

System Application Engineer – Customer System Engineering

  • Own customer-facing technical support for system bring-up, integration, validation, and issue resolution.
  • Perform platform configuration, validation, and system-level debugging on customer setups.
Marketing

Sr. Manager – Data Center & B2B AI Marketing (US & Europe)

NewPosted 4 weeks ago

Sr. Manager – Data Center & B2B AI Marketing (US & Europe)

  • Go-to-Market Strategy Ownership: Develop and lead comprehensive B2B marketing strategies for MediaTek's data center and AI technology portfolio, including XPUs/AI accelerators, packaging, networking/interconnect technologies etc. that powers the modern AI factory, tailored to key target audiences such as hyperscalers, cloud providers, OEMs, and enterprise IT leaders.
Other Engineering

Analog Modeling Engineer

NewPosted 1 month ago

Analog Modeling Engineer

  • Education:
  • - Bachelor's degree in Electrical Engineering, Electronics, or related field
Other Engineering

Physical Design Technical Leader

NewPosted 1 month ago

Physical Design Technical Leader

  • Guide customers in selecting optimal EDA tools, implementation flows, and methodologies.
  • Perform and review physical design checks to ensure customer tape-out quality meets MediaTek’s standards.
Other Engineering

Staff/Sr. Staff GPU Engineer – Shader System RTL Design/Microarchitecture

NewPosted 1 month ago

Staff/Sr. Staff GPU Engineer – Shader System RTL Design/Microarchitecture

  • Define, develop, and own GPU shader system microarchitecture specifications for industry-leading graphics and compute IP.
  • Lead RTL design and microarchitecture development for shader-related blocks, including shader core pipelines, thread dispatch, warp/wavefront scheduling, instruction issue, operand collection, register file access, scoreboard, dependency tracking, execution control, and pipeline flow control.
Other Engineering

Analog/Mixed-Signal Layout Engineer

NewPosted 1 month ago

Analog/Mixed-Signal Layout Engineer

  • - Bachelor degree with 6 years of experience or equivalent.
  • - Work closely with designers to discuss circuit concerns, and develop effective solutions together.
Engineering

Senior Staff/Principal Engineer

NewPosted 1 month ago

Senior Staff/Principal Engineer

  • Develop advanced algorithms for 6G modems - Implement high-level modem algorithms in C/C++ simulation platforms and perform design trade-off and optimization in terms of performance, complexity and power consumption - Collaborate with ASIC, DSP, and L1 design teams from different sites worldwide and provide a full support for fixed-point design, pre- and post-silicon verifications in the product development - Conducting future advanced research and development activities in wireless communication areas.
Marketing

Compute Technology Marketing Sr. Director

NewPosted 2 months ago

Compute Technology Marketing Sr. Director

  • Drive workload analysis programs (e.g., for Agentic AI) to support silicon product planning, articulating their impact and implications for system architecture from a market and competitive perspective. This involves understanding how future roadmap features or system capabilities, particularly those enabled by next-gen hardware (e.g., advanced power management, on-device LLMs running on xPU, new I/O features), can be leveraged for market advantage.
Marketing

Compute Technology Marketing Sr. Lead

NewPosted 2 months ago

Compute Technology Marketing Sr. Lead

  • Drive workload analysis programs (e.g., for Agentic AI) to support silicon product planning, articulating their impact and implications for system architecture from a market and competitive perspective. This involves understanding how future roadmap features or system capabilities, particularly those enabled by next-gen hardware (e.g., advanced power management, on-device LLMs running on xPU, new I/O features), can be leveraged for market advantage.
Other Engineering

Senior CPU Power Delivery Engineer

NewPosted 2 months ago

Senior CPU Power Delivery Engineer

  • Design and analyze power delivery networks (PDN) for CPU clusters (including big/mid/little core configurations) across advanced process nodes (5nm, 4nm, 3nm)
  • Develop PDN impedance models and perform frequency-domain and time-domain simulations to meet target noise margins
Other Engineering

Test and Validation Tech Lead

NewPosted 2 months ago

Test and Validation Tech Lead

  • Lead validation strategy and execution for optical engines and fiber optic transceivers used in AI systems.
  • Build reusable automated optical test frameworks, software, and data analysis tools across teams.
Other Engineering

Serdes System Architecture Research and Development Engineer

NewPosted 2 months ago

Serdes System Architecture Research and Development Engineer

  • 1. Experience in developing or using high-speed SerDes PHY systems (at least 100G PAM4) and familiarity with relevant industry standards (either 802.3, OIF, or PCIe) – Must
  • 2. A considerable understanding of 802.3 wireline communication algorithms, such as Channel modeling, Adaptive equalizer, CDR, ADC calibration, etc. – Must
Other Engineering

Senior Staff/Staff Power Integrity Engineer

NewPosted 2 months ago

Senior Staff/Staff Power Integrity Engineer

  • M.S. or Ph.D. in Electrical Engineering or a related field.
  • 6+ years of experience in power delivery and power integrity analysis for high performance SoCs and advance packaging technologies.
Engineering

Sr. Staff/Principal GPU Engineer – Geometry/Tiler Microarchitecture

NewPosted 2 months ago

Sr. Staff/Principal GPU Engineer – Geometry/Tiler Microarchitecture

  • Define and develop GPU cluster-level microarchitecture specifications for industry-leading graphics IP.
  • Lead microarchitecture design for GPU geometry and tiler-related blocks, including primitive processing, tiling, binning, raster front-end, scheduling, and workload distribution.
Engineering

Firmware Tech Lead

NewPosted 2 months ago

Firmware Tech Lead

  • Architect, develop, debug, and release embedded firmware for QSFP-DD, OSFP, and optical engine platforms.
  • Define MCU/processor, memory, boot, and peripheral requirements for optical module and optical engine control subsystems.
Engineering

Senior/Principal Engineer – GPU Modeling / GPU Architect

NewPosted 2 months ago

Senior/Principal Engineer – GPU Modeling / GPU Architect

  • Define and develop best in class GPU architecture and performance/power models for next generation MediaTek SoCs.
  • Build and maintain cycle accurate / performance / functional models of GPU subsystems (e.g., shader cores, fixed function units, memory hierarchy, interconnect).