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MediaTek
5000+ EmployeesActively Hiring
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Manager / Sr. Manager – AI & Automotive B2B Marketing
NewPosted 4 days ago
Manager / Sr. Manager – AI & Automotive B2B Marketing
- 8–12 years of B2B technology marketing experience, with a minimum of 3–5 years focused on AI/ML, generative AI, automotive or platform marketing, cloud infrastructure, or semiconductor marketing.
- Demonstrated fluency in AI compute — NPU and accelerator architecture, GPU compute for AI, and the trade-offs between training and inference, cloud and edge, throughput and power — with enough software stack knowledge (models, frameworks, runtimes, quantization, deployment) to connect silicon capability to real workloads.
In office • San Jose
$171k – $244kMarketing
Marketing Manager - AI & Automotive B2B Marketing (San Jose, CA)
NewPosted 5 days ago
Marketing Manager - AI & Automotive B2B Marketing (San Jose, CA)
- AI Narrative & Compute Positioning: Own MediaTek's generative AI and edge AI marketing narrative across compute platforms — data center AI, AI PC, on-device and edge inference, and AI in the vehicle. Build the messaging frameworks, positioning, and proof points that explain why MediaTek silicon is the right place to run modern AI workloads: NPU and accelerator architecture, GPU compute for AI, memory bandwidth, and performance per watt, and how those choices translate into real inference throughput, latency, and cost. Show that continuity across form factors as a differentiator against single-market competitors.
In office • San Jose
$171k – $244kOther Engineering
System Expert for SLT
NewPosted 5 days ago
System Expert for SLT
- Key Development Technologies: System development with high-speed physical layer data transmission software development, hardware performance optimization, and product quality control.
- Main Objectives: Complete system integration for customized ICs in Enterprise/AI/xPU and related industries, and assist customers in mass production, especially SLT.
In office • San Jose
$150k – $266kOther Engineering
Firmware Principal Engineer
NewPosted 1 week ago
Firmware Principal Engineer
- Architect, develop, debug, and release embedded firmware for optical engine platforms.
- Define MCU/processor, memory, boot, and peripheral requirements for optical module and optical engine control subsystems.
In office • San Jose
$180k – $301kOther Engineering
Integrated Voltage Regulator (IVR) Engineering Lead
NewPosted 2 weeks ago
Integrated Voltage Regulator (IVR) Engineering Lead
- Lead and mentor a team of analog, mixed-signal, and power delivery engineers, providing technical direction and fostering a culture of innovation, execution excellence, and continuous learning.
- Define and drive the architecture, modeling, design, and validation of integrated voltage regulator (IVR) solutions for next-generation CPU, GPU, AI, and accelerator products.
In office • San Jose
$201k – $287kOther Engineering
System Expert for Post-silicon including SLT
NewPosted 3 weeks ago
System Expert for Post-silicon including SLT
- Key Development Technologies: System development with high-speed physical layer data transmission software development, hardware performance optimization, and product quality control.
- Main Objectives: Complete system integration for customized ICs in Enterprise/AI/xPU and related industries, and assist customers in mass production, especially SLT.
In office • San Jose
$150k – $266kOther Engineering
Senior System Engineer
NewPosted 1 month ago
Senior System Engineer
- Work with the engineering team to integrate MediaTek SOC platforms with customer
- Software development and integration for customizing software for customer product
In office • San Jose
$130k – $230kOther Engineering
Datacenter Compute Platform Architect
NewPosted 1 month ago
Datacenter Compute Platform Architect
- Platform Architecture Definition: Define the compute system architecture (workstation, 1U/2U, multi-node, OCP form factors) surrounding our Datacenter compute SoC.
- Power & Thermal Management: Architect system-level power delivery networks (PDN/VRM specs) and collaborate on advanced thermal solutions (air and liquid cooling) to meet strict datacenter TDP constraints.
In office • San Jose
$211k – $356kOther Engineering
Datacenter Server CPU Platform Architect
NewPosted 1 month ago
Datacenter Server CPU Platform Architect
- Platform Architecture Definition: Define the compute system architecture (workstation, 1U/2U, multi-node, OCP form factors) surrounding our Datacenter compute SoC.
- Power & Thermal Management: Architect system-level power delivery networks (PDN/VRM specs) and collaborate on advanced thermal solutions (air and liquid cooling) to meet strict datacenter TDP constraints.
In office • San Jose
$211k – $356kOther Engineering
Senior System Application Engineer – SerDes & System Tuning
NewPosted 1 month ago
Senior System Application Engineer – SerDes & System Tuning
- Lead customer SerDes bring-up, tuning, validation, and advanced debug end-to-end.
- Tune SerDes/link parameters to improve stability, BER, and operating margin; analyze link training and equalization behavior.
In office • San Jose
$142k – $244kOther Engineering
System Application Engineer – Customer System Engineering
NewPosted 1 month ago
System Application Engineer – Customer System Engineering
- Own customer-facing technical support for system bring-up, integration, validation, and issue resolution.
- Perform platform configuration, validation, and system-level debugging on customer setups.
In office • San Jose
$116k – $203kOther Engineering
Analog Modeling Engineer
NewPosted 2 months ago
Analog Modeling Engineer
- Education:
- - Bachelor's degree in Electrical Engineering, Electronics, or related field
In office • Austin
$128k – $217kOther Engineering
Physical Design Technical Leader
NewPosted 2 months ago
Physical Design Technical Leader
- Guide customers in selecting optimal EDA tools, implementation flows, and methodologies.
- Perform and review physical design checks to ensure customer tape-out quality meets MediaTek’s standards.
In office • San Jose
$179k – $286kOther Engineering
Staff/Sr. Staff GPU Engineer – Shader System RTL Design/Microarchitecture
NewPosted 2 months ago
Staff/Sr. Staff GPU Engineer – Shader System RTL Design/Microarchitecture
- Define, develop, and own GPU shader system microarchitecture specifications for industry-leading graphics and compute IP.
- Lead RTL design and microarchitecture development for shader-related blocks, including shader core pipelines, thread dispatch, warp/wavefront scheduling, instruction issue, operand collection, register file access, scoreboard, dependency tracking, execution control, and pipeline flow control.
In office • San Diego
$150k – $244kOther Engineering
Analog/Mixed-Signal Layout Engineer
NewPosted 2 months ago
Analog/Mixed-Signal Layout Engineer
- - Bachelor degree with 6 years of experience or equivalent.
- - Work closely with designers to discuss circuit concerns, and develop effective solutions together.
In office • Woburn
$140k – $200kEngineering
Senior Staff/Principal Engineer
NewPosted 2 months ago
Senior Staff/Principal Engineer
- Develop advanced algorithms for 6G modems - Implement high-level modem algorithms in C/C++ simulation platforms and perform design trade-off and optimization in terms of performance, complexity and power consumption - Collaborate with ASIC, DSP, and L1 design teams from different sites worldwide and provide a full support for fixed-point design, pre- and post-silicon verifications in the product development - Conducting future advanced research and development activities in wireless communication areas.
In office • Irvine
$188k – $356kMarketing
Compute Technology Marketing Sr. Director
NewPosted 3 months ago
Compute Technology Marketing Sr. Director
- Drive workload analysis programs (e.g., for Agentic AI) to support silicon product planning, articulating their impact and implications for system architecture from a market and competitive perspective. This involves understanding how future roadmap features or system capabilities, particularly those enabled by next-gen hardware (e.g., advanced power management, on-device LLMs running on xPU, new I/O features), can be leveraged for market advantage.
In office • San Jose
$249k – $339kMarketing
Compute Technology Marketing Sr. Lead
NewPosted 3 months ago
Compute Technology Marketing Sr. Lead
- Drive workload analysis programs (e.g., for Agentic AI) to support silicon product planning, articulating their impact and implications for system architecture from a market and competitive perspective. This involves understanding how future roadmap features or system capabilities, particularly those enabled by next-gen hardware (e.g., advanced power management, on-device LLMs running on xPU, new I/O features), can be leveraged for market advantage.
In office • San Jose
$249k – $339kOther Engineering
Test and Validation Tech Lead
NewPosted 3 months ago
Test and Validation Tech Lead
- Lead validation strategy and execution for optical engines and fiber optic transceivers used in AI systems.
- Build reusable automated optical test frameworks, software, and data analysis tools across teams.
In office • San Jose
$211k – $356kOther Engineering
Serdes System Architecture Research and Development Engineer
NewPosted 3 months ago
Serdes System Architecture Research and Development Engineer
- 1. Experience in developing or using high-speed SerDes PHY systems (at least 100G PAM4) and familiarity with relevant industry standards (either 802.3, OIF, or PCIe) – Must
- 2. A considerable understanding of 802.3 wireline communication algorithms, such as Channel modeling, Adaptive equalizer, CDR, ADC calibration, etc. – Must
In office • San Jose
$190k – $270k