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Jobs at Celero Communications
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Other Engineering
Senior ASIC Design Engineer - DSP/Analog/SerDes
NewPosted 4 days ago
Senior ASIC Design Engineer - DSP/Analog/SerDes
- Design and implement high-performance digital circuits and ASIC blocks using Verilog and SystemVerilog.
- Develop and integrate DSP, digital communication, and high-speed SerDes functionality into complex ASIC designs.
In office • Irvine
$150k – $250kOther Engineering
Post-Silicon Validation Engineer (Multiple Levels)
NewPosted 4 days ago
Post-Silicon Validation Engineer (Multiple Levels)
- Post-silicon validation and characterization of complex ASICs and SoCs from first silicon through production release
- Participate in functionality, performance, interoperability, compliance, stress testing, corner cases, and reliability functions
In office • Ottawa
$100k – $200kOther Engineering
Principal Optical Systems Engineer
NewPosted 6 days ago
Principal Optical Systems Engineer
- Partner with the DSP systems group to translate high-level system requirements into DSP performance targets for equalization, clock recovery, and laser frequency and phase recovery
- Establish link budgets based on DSP specifications to set performance targets for optical components and work with module partners to optimize link margin
In office • Ottawa
Other Engineering
Principal Physical Design Engineer
NewPosted 1 month ago
Principal Physical Design Engineer
- RTL-to-GDSII Execution: Own physical implementation of System-on-Chips (SoCs) or complex digital blocks.
- Design Optimization: Manage floor-planning, bump planning, power grid design, and clock tree synthesis (CTS) to optimize chip performance.
In office • San Jose
$150k – $250kOther Engineering
Principal High-Speed Analog Layout Design Engineer
NewPosted 1 month ago
Principal High-Speed Analog Layout Design Engineer
- Lead and own the physical layout design of complex analog/mixed-signal macros (e.g., ADCs, DACs, PLLs), from floor planning through final verification
- Collaborate closely with schematic designers to create optimal layout solutions considering performance, matching, symmetry, and reliability
In office • Irvine
$150k – $250kOther Engineering
ASIC Design Engineer – DSP / Analog / SerDes
NewPosted 2 months ago
ASIC Design Engineer – DSP / Analog / SerDes
- Design and implement high-performance digital circuits and ASIC blocks using Verilog and SystemVerilog.
- Develop and integrate DSP, digital communication, and high-speed SerDes functionality into complex ASIC designs.
In office • Ottawa
Other Engineering
Principal Analog Design Engineer
NewPosted 2 months ago
Principal Analog Design Engineer
- High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
- Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
In office • Vancouver