Avatar for ScaleFlux
Computational storage technology for data

SoC Design Lead Engineer

Posted: 4 weeks ago
Job Location
Remote Work Policy

In office

Visa Sponsorship

Not Available

RelocationAllowed
Skills
Flash
Verilog
Uart
SSP
System Verilog
I2C
PCIe
DRAM
Constraints Development
DC/DC-T Based Synthesis
RTL Level Checks

About the job

We are looking for SoC Design Lead Engineer to join our rapidly growing design team focused on high performance data center infrastructure SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, result-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create the next generation enterprise data center solutions.

Responsibilities

  • Contribute to SoC architecture for a multi-core ARM SOC
  • Define SoC micro architecture and design
  • Build SoC around key ARM subsystem components and other IPs including various interfaces
  • Design of clock-reset architecture and RTL implementation
  • Integration of all IPs into SoC
  • Work with verification team for complete SoC verification, review test plans
  • RTL Simulation and debug
  • Synthesis, Lint, CDC checks
  • Assist in emulation, FPGA, prototyping effort

Qualifications

Required:

  • Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering/VLSI with10+ years of practical experience
  • Strong fundamentals in digital ASIC design
  • Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture
  • Multiple project experience with ARM based ecosystem components (A-series ARM Cores, SMMU, GIC, Core sight, NIC and other complex bus interconnects)
  • Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs
  • Exposure to ARM platform architecture specifications
  • Strong experience with Verilog, System Verilog, DC/DC-T based synthesis, constraints development and RTL level checks. Low power methodology knowledge will be a plus.
  • Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART.
  • Capable of working with multiple IP vendors and other teams
  • Excellent communication and leadership quality to lead design team

About the company

ScaleFlux company logo
Computational storage technology for data51-200 Employees
Learn more about ScaleFlux image

Funding

AMOUNT RAISED
$25M
FUNDED OVER
1 round
Round
B
$25000000
Series B - Mar 2018