Not Available
Onsite or remote
About the job
Verifaix is on a mission to transform hardware verification for semiconductor companies using Generative AI alongwith novel formal and simulation algorithms. Founded by industry leaders from Silicon Valley and top researchers from Princeton and Stanford, we’re passionate about automating chip design and improving verification productivity.
Role:
We’re looking for exceptional engineers to join our team and enhance our generative AI platform. In this role, you will apply cutting-edge techniques to fine-tune LLMs and implement novel ways to improve its performance for hardware verification. As an early team member, you'll have an opportunity to influence the product and our future direction, working closely with passionate experts in AI and chip design.
Requirements:
BS, MS, or PhD (preferred) in CS or ECE with a focus on ML or chip design (e.g., Formal methods, Computer Architecture).
Open to full-time, part-time, or internship roles for current PhD students
Strong Python programming skills (industry experience a plus)
Experience with fine-tuning LLMs
Familiarity with hardware description languages like Verilog/SystemVerilog and SystemVerilogAssertion (SVA) language
Familiarity with frameworks like LangChain, ReAct, or other LLM reasoning, and action integration methods
Interest in AI research and advancements
Responsibilities:
Fine-tune and optimize LLMs for chip design applications
Integrate generative models with structured and unstructured data using RAG techniques
Experiment with integration of reasoning frameworks with LLMs for the specification application
Develop benchmarks and metrics to assess model quality
Why Verifaix?
Make an Impact: Help disrupt hardware verification, a major cost in chip design, with the power of AI.
Collaborate with Experts: Work with leaders in AI and chip design, learning from the best in the field.
Startup Experience for Gen AI product: Work with highly sought Gen AI technologies for transforming hardware design verification