Senior FPGA Engineer II

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you.

We are looking to add a Senior FPGA Engineer II to our team. If you are great at what you do, enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design is also desirable. The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.

Successful candidates will require, as a minimum:

• A Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
• 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx’s Vivado, Modelsim, etc.).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

Preferred experience includes:

• Aerospace design and qualification.
• Worst-case analysis, failure method and criticality analyses, and reliability analysis.
• Experience with board-level hardware design.
• Familiarity with communications systems, such as digital signal processing.