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Jobs at Aeva
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Engineering
Software Quality Engineer - ASPICE
NewPosted 1 month ago
Software Quality Engineer - ASPICE
- Lead and manage quality assurance activities throughout the product development lifecycle to ensure compliance with Automotive SPICE (ASPICE) standards.
- Develop, implement, and maintain software quality assurance processes and methodologies to meet Cybersecurity (ISO 21434) and Functional Safety (ISO 26262) requirements.
Mountain View
Other Engineering
Systems Engineer - LiDAR Algorithms
NewPosted 1 month ago
Systems Engineer - LiDAR Algorithms
- Systems analysis: Analyze end-to-end system-level issues through collaboration with HW and SW teams to understand factors affecting the system performance in real-world scenarios.
- Algorithm development: Develop point cloud processing algorithms in FW to optimize performance, and develop product requirements to meet design specifications.
Mountain View
Engineering
Principal Hardware Test Automation Engineer
NewPosted 1 month ago
Principal Hardware Test Automation Engineer
- Lead a team of skilled engineers dedicated to the design and development of automation software used to run assembly and test stations in the manufacturing line.
- Work on the full software stack, enabling automation of complex Lidar tests, component alignment, and tests, robot-based part handling for the fully automated manufacturing line, designing control interfaces, integration with factory automation and standardizing data components, and optimizing calibration procedures.
Mountain View
Other
PLM Manager
NewPosted 1 month ago
PLM Manager
- Manage change control process from NPI through production.
- Coordinate and audit engineering documentation and product releases.
Chihuahua
Other
Director, Test & Manufacturing Automation
NewPosted 1 month ago
Director, Test & Manufacturing Automation
- Lead development of test stations for Aeva’s LiDAR manufacturing line, including hardware design, automation, and integration with factory MES systems.
- Influence the design of stations (DfT and DfM) for touchless assembly in the manufacturing line. This includes collaborating with contract manufacturers and equipment vendors to integrate material handling systems and factory automation.
Mountain View
Engineering
Reliability Test Engineer
NewPosted 1 month ago
Reliability Test Engineer
- Design and develop comprehensive reliability test plans, protocols, and procedures for Aeva’s LiDAR systems and modules.
- Conduct reliability testing, including environmental, mechanical, thermal, and electrical stress tests.
Mountain View
Other Engineering
Senior Manufacturing Engineer
NewPosted 6 months ago
Senior Manufacturing Engineer
- Perform process set-up and optimization, data analysis and interpretation to identify trends, patterns, and potential issues. Perform DFM analysis. Implement improvement in the manufacturing process for yield and product quality.
- Collaborate with hardware engineer and CM to install machine, perform machine/process validatio...
Chon Buri
Engineering
Senior Embedded Software Engineer
NewPosted 7 months ago
Senior Embedded Software Engineer
- Design, review, and implement embedded software in C Programming Language for the Aeva 4D LiDAR Sensor.
- Interacting with cross-functional teams, such as the validation and product to design and implement security functions, identify potential vulnerabilities, and develop threat modeling.
Mountain View
Other
Staff Design Engineer
NewPosted 9 months ago
Staff Design Engineer
- Develop sub-components of the digital signaling pipeline.
- Code RTL, Test, and Validate Aeva-specific sub-components.
Bengaluru
Other
Staff SoC Verification Engineer
NewPosted 1 year ago
Staff SoC Verification Engineer
- Lead and drive block, subsystems, and full-chip verification of advanced ARM-based SOCs.
- Architect and build test benches, reference models, and scoreboards using SystemVerilog and UVM-constrained random methodologies
Bengaluru
Other
Staff Design Verification Engineer
NewPosted 1 year ago
Staff Design Verification Engineer
- Responsible for verifying state-of-art DSP design at block, subsystems, and full-chip level verification environments.
- Define and develop testbenches, constrained random verification environments, reference models, and scoreboards using SystemVerilog and UVM methodologies
Bengaluru