Junior Post-Silicon Validation Engineer

Location: Ann Arbor, Michigan (on-site lab, with flexible remote-eligible days)

Team: Silicon Validation / Test Engineering / Embedded Systems

Level: Entry-level / Junior (New Grad or ~0–2 years of experience)

Work Authorization: Must be a U.S. citizen or current green card holder.

ABOUT MOVELLUS

Movellus is a semiconductor infrastructure IP company built on clock-generation research that began at the University of Michigan. Our Aeonic™ portfolio — including synthesizable clock generation, power-delivery monitoring, and droop-response IP — helps chipmakers push the limits of power and performance in the AI era. Our Ann Arbor office is one of our R&D hubs, where we design, characterize, and validate this IP on real silicon before it ships to customers.

We're a small, close-knit team, and that means every engineer's work is directly visible in the products our customers rely on.

THE ROLE

We're looking for a junior Post-Silicon Validation Engineer to join our small lab team characterizing Movellus IP on test chips. You'll spend most of your time running and maintaining Python-based lab automation — controlling instruments, monitoring runtime metrics, and moving data from bench to analysis — alongside hands-on bench work: reconfiguring test setups, swapping devices under test, and connecting equipment to measurement nodes. You'll also have the opportunity to contribute to FPGA-based test infrastructure as our test needs evolve.

We value motivation, curiosity, and teamwork. You'll work closely with experienced engineers who will mentor you on both the equipment and the underlying silicon. This is a great fit for someone who wants to build deep, hands-on hardware intuition early in their career — you'll learn how silicon actually behaves on the bench, not just on paper.

WHAT YOU'LL DO

• Write, run, and maintain Python scripts that automate our lab equipment and monitor runtime metrics during data collection.
• Use AI coding assistants like Claude Code as part of your daily workflow for writing, debugging, and understanding code faster.

• Reconfigure hardware between test runs — swapping cables, connecting test equipment to measurement nodes, and moving test devices in and out of test assemblies.

• Read and interpret schematics for our custom testing PCBs.

• Operate and remotely control lab instrumentation, such as oscilloscopes, a range of power supplies, electronic loads, digital multimeters, DACs, and spectrum analyzers.

• Contribute to FPGA code supporting our test infrastructure.

• Characterize IP performance on test chips, and help troubleshoot and root-cause unexpected behavior on the bench.

• Document lab findings clearly enough to communicate them to a wide array of stakeholders, including design, marketing, and sales colleagues, to make sure test plans reflect real customer and product needs.

WHAT WE'RE LOOKING FOR

• BS in Electrical Engineering, Computer Engineering, or a related field — new grads, students graduating this semester, and candidates with a BS plus up to ~2 years of relevant experience are all encouraged to apply. Candidates with an MS are also welcome, though we're specifically building out our junior bench.
• Working knowledge of fundamental lab equipment and measurement concepts.
• Comfort writing Python and C for automation and data handling; any exposure to instrument remote-control interfaces is a plus.
• Ability to read a schematic and reason about a circuit — supply rails, pull-ups, common PCB- and silicon-level serial protocols, and similar fundamentals.
• Genuine comfort with hands-on hardware work: cabling, sockets, and swapping DUTs safely and carefully.
• Exposure to FPGA design/coding is a plus, not a requirement.
• A curious, hands-on mindset — you like figuring out why a measurement looks wrong as much as confirming it looks right.
• Strong communication and documentation habits, and a genuine interest in working closely with a small team.